A lithographic process is one that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a field (e.g. comprising part of, one, or several product dies) on a substrate (e.g. a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. Stepping and/or scanning movements can be involved, to repeat the pattern at successive target portions across the substrate. It is also possible to transfer the pattern from the patterning device to the substrate by imprinting the pattern onto the substrate. In the following description of examples, the term “exposure” may be used for convenience to refer to the step of applying a pattern to a field or to a substrate, without indicating any limitation to optical imaging or to exclude imprinting.
A key performance parameter of the lithographic apparatus is the overlay error. This error, often referred to simply as “overlay”, is the error in placing a product features in the correct position relative to features formed in previous layers. As device structures become every smaller, overlay specifications become ever tighter. Overlay will be used as a main example of performance parameter in the present disclosure, while the concepts and techniques disclosed herein can in principle be applied to the measurement and improvement of other performance parameters as well. Examples of performance parameters of a lithographic process include for example critical dimension (CD), CD uniformity and the like.
Currently the overlay error is controlled and corrected by means of methods such as advanced process control (APC) described for example in US2012008127A1 and wafer alignment models described for example in US2013230797A1.
Within the lithographic apparatus, wafer alignment models are conventionally applied based on measurement of alignment marks provided on the substrate. The measurements are made by the lithographic apparatus as a preliminary step of every patterning operation. The alignment models may include higher order models, to correct for non-linear distortions of the wafer. The alignment models may also be expanded to take into account other measurements and/or calculated effects such as thermal deformation during a patterning operation
To achieve good performance in the lithographic apparatus, it is generally necessary to perform a calibration of the apparatus after any interruption in operation. Calibration, broadly speaking, involves (i) using the apparatus, (ii) measuring the performance of the apparatus and (iii) based on errors observed in the measured performance, controlling the apparatus to correct the errors and improve performance in subsequent production. To achieve the highest possible performance, many individual variables have to be measured and taken into account.
As an example of such variables, some errors may be classed as “intra-field” errors that recur systematically depending on the position within each field. Other errors may be classed as “inter-field” errors that recur systematically as a function of position on the substrate as a whole. Furthermore, overlay in a particular field may be dependent on the particular scanning direction and/or stepping direction that is used by the lithographic apparatus to expose all the fields in an efficient manner. Changes in the product field size and/or exposure sequence may therefore change the performance of the apparatus. Consequently, to obtain highest performance currently requires new calibration of the lithography apparatus for each change in the product pattern (field size), or even if a new exposure sequence or new grid positioning is to be used. Calibration may have to be performed separately for each chuck (substrate support or wafer table) that may be used within the apparatus. Production is interrupted during the calibration. This directly reduces the production throughput of the lithographic apparatus. If the apparatus will be used for a long period to produce the same product, the lost throughput may be acceptable. Often, however, a lithographic apparatus is used to produce a number of different product layouts day-by-day or hour-by-hour, according to customer demand. Calibrating the apparatus for each individual layout or pattern is unfeasible, even for relatively modest numbers of individual layouts, since it would significantly reduce production throughput. On the other hand, not calibrating for each new design may significantly limit the overlay performance that can be achieved.